1. Field of Invention
The present invention relates to a mechanism that controls the reprogramming of memory. More particularly, the present invention relates to a device capable of preventing the loss of data from programmable non-volatile memory due to illegally tampering or reprogramming.
2. Description of Related Art
To satisfy the need for plug and play function, the basic input/output system (BIOS) program for starting a personal computer (PC) is stored inside a programmable non-volatile memory. In fact, programmable non-volatile memory such as electrical erasable programmable read only memory (EEPROM) or flash ROM is used as a storage medium because stored data can be retained after power is cut off. New data can still be written into the memory, if necessary, however, due to the re-programmable capability, the BIOS program is an easy target for corruption through a computer virus attack. Once data within the BIOS program is erased or changed, the computer can start only with difficulty. The cost of recovering from the damage caused by a virus attack is usually very high. Moreover, data within the BIOS is very much dependent upon the type of computer. Hence, a universal solution to the problem is difficult to find.
FIG. 1 is a block diagram showing a conventional re-programming control mechanism for a flash ROM. In fact, most programmable non-volatile memory also employs the same type of re-programming mechanism. In FIG. 1, the flash memory 10 includes a combinatorial logic circuit 12 and a flash memory cell array 14. Lines having the labels I.sub.0l -I.sub.0n represent the input signal to the combinatorial logic circuit 12. These are the memory write enable signals. In other words, these are the internal signals for reprogramming control.
When the input signals I.sub.0l -I.sub.0n picked up by the combinatorial logic circuit 12 match a set of internal parameters, the combinatorial logic circuit 12 issues a logic `true` output signal on the memory write enable MWE line. Conversely, if the input signals I.sub.0l -I.sub.0n picked up by the combinatorial logic circuit 12 do not match the set of internal parameters, a logic `false` signal is issued on the memory write enable MWE line. As soon as the flash memory cell array 14 receives a logic `true` signal from the memory write enable MWE line, the flash memory cell array 14 can be re-programmed. However, if the flash memory cell array 14 receives a logic `false` signal from the MWE line, re-programming of the flash memory cell array 14 is not allowed. In the above description, a logic `true` may mean either a high potential `1` or a low potential `0` depending on the design.
With the aforementioned circuit arrangement, any software programmer knowing the set of internal parameters of the combinatorial logic circuit 12 can re-program the flash memory cell array 14 in whatever ways desired. Consequently, corruption of the BIOS program inside the memory is possible.